View AN2528D_927194.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? motorola, inc., 2003 an2528/d rev. 0, 5/2003 standard space vector modulation tpu function set (svmstd) application note by milan brejl, ph.d. functional overview standard space vector modulation (svmstd) is a technique that is used to implement a straightforward method of switching motor windings in applications such as ac induction motor control and pmsm motor control. the function set consists of 5 tpu functions: ? standard space vector modulation ? top (svmstd_top) standard space vector modulation ? bottom (svmstd_bottom) synchronization signal for standard space vector modulation (svmstd_sync) resolver reference signal for standard space vector modulation (svmstd_res) fault input for standard space vector modulation (svmstd_fault) the svmstd_top and svmstd_bottom tpu functions work together to generate a 6-channel 3-phase center-aligned pwm signal with dead-time between the top and bottom channels. the synchronization signal for the svmstd function figure 1. signals generated by svmstd tpu function set change of pw m period fault ! new initialization phase a - top phase a - bottom phase b - top phase b - bottom phase c - top phase c - bottom fault (input signal) synchronization signal 1.6 ms resolver reference signal change of pw m period fault ! new initialization phase a - top phase a - bottom phase b - top phase b - bottom phase c - top phase c - bottom fault (input signal) synchronization signal 1.6 ms resolver reference signal f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 2 standard space vector modulation tpu function set (svmstd) can be used to generate one or more adjustable signals for a wide range of uses, that are synchronized to the pwm, and track changes in the pwm period. the resolver reference signal for the svmstd function can be used to generate one or more 50% duty-cycle adjustable signals that are also synchronized to the pwm.the fault input for the svmstd function is a tpu input function that sets all pwm outputs low when the input signal goes low. see figure 1 . function set configuration none of the tpu functions in the standard space vector modulation tpu function set can be used separately. the svmstd_top and svmstd_bottom functions have to be used together. the svmstd_top is used on 3 channels, the svmstd_bottom on a further 3 channels, and within each phase, the function svmstd_top has to be assigned on a lower tpu channel than the function svmstd_bottom. this is illustrated in the examples in table 2 and table 3 . one or more channels running a synchronization signal for svmstd as well as resolver reference signals for svmstd functions can be added to the svmstd_top and svmstd_bottom functions. they can run with different settings on each channel. the function fault input for svmstd can also be added to the svmstd_top and svmstd_bottom functions. it is recommended to use it on channel 15, and to select the hardware option that disables all tpu output pins when the channel 15 input signal is low (dtpu bit = 1). this ensures that the hardware reacts quickly to a pin fault state. note that it is not only the pwm channels, but all tpu output channels, including the synchronization signals, that are disabled in this configuration. table 1 shows the configuration options and restrictions. table 2 and table 3 show two examples of configuration. table 1. svmstd tpu function set configuration options and restrictions tpu function optional/ mandatory how many channels assignable channels svmstd_top mandatory 3 any 3 channels, within each phase a lower tpu channel than the same phase svmstd_bottom svmstd_bottom mandatory 3 any 3 channels, within each phase a higher tpu channel than the same phase svmstd_top svmstd_sync optional 1 or more any channels svmstd_res optional 1 or more any channels svmstd_fault optional 1 any, recommended is 15 and dtpu bit set f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d function set configuration standard space vector modulation tpu function set (svmstd) 3 table 4 shows the tpu function code sizes. configuration order the cpu configures the tpu as follows. 1. disables the channels by clearing the two channel priority bits on each channel used (not necessary after reset). 2. selects the channel functions on all used channels by writing the function numbers to the channel function select bits. table 2. example of configuration channel tpu function priority 0svmstd_tophigh 1 svmstd_bottom high 2svmstd_tophigh 3 svmstd_bottom high 4svmstd_tophigh 5 svmstd_bottom high 10 svmstd_sync low 15 svmstd_fault high table 3. example of configuration channel tpu function priority 0svmstd_tophigh 1svmstd_tophigh 2svmstd_tophigh 3 svmstd_bottom high 4 svmstd_bottom high 5 svmstd_bottom high 10 svmstd_sync low 11 svmstd_res low 15 svmstd_fault high table 4. tpu function code sizes tpu function code size svmstd_top 16 instructions + 8 entries = 24 long words svmstd_bottom 197 instructions + 8 entries = 205 long words svmstd_sync 26 instructions + 8 entries = 34 long words svmstd_res 38 instructions + 8 entries = 46 long words svmstd_fault 9 instructions + 8 entries = 17 long words f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 4 standard space vector modulation tpu function set (svmstd) 3. initializes function parameters. the parameters t , prescaler , dt , mpw , sqrt3 and sync_presc_addr must be set before initialization. if an svmstd_sync channel or an svmstd_res channel is used, then also its parameters must be set before initialization. 4. issues an hsr (host service request) type %10 to one of the svmstd_bottom channels to initialize all pwm channels. issues an hsr type %10 to the svmstd_sync channels, svmstd_res channels and svmstd_fault channel, if used. 5. enables servicing by assigning high, middle or low priority to the channel priority bits. all pwm channels must be assigned the same priority to ensure correct operation. the cpu must ensure that the svmstd_sync or svmstd_res channels are initialized after the initialization of pwm channels: ? assign a priority to the pwm channels to enable their initialization ? if a synchronization signal or a resolver reference signal channel is used, wait until the hsr bits are cleared to indicate that initialization of the pwm channels has completed and ? assign a priority to the svmstd_sync or svmstd_res channels to enable their initialization note: a cpu routine that configures the tpu can be generated automatically using the mpc500_quick_start graphical configuration tool. detailed functi on description standard space vector modulation ? top (svmstd_top) and standard space vector modulation ? bottom (svmstd_bottom) the svmstd_top and svmstd_bottom tpu functions work together to generate a 6-channel, 3-phase pwm signal, with dead-time between the top and bottom channels. in order to charge the bootstrap transistors, the pwm signals start to run 1.6ms after their initialization (at 20mhz tcr1 clock). the functions generate signals corresponding to reference voltage vector amplitude of 0 (50% duty-cycle) until the first reload values are processed. the cpu controls the pwm output by setting the tpu parameters. the stator reference voltage vector components u and u a have to be adjusted during run time. the pwm period t and the prescaler ? the number of pwm periods per reload of new values ? are also read at each reload, so these parameters can be changed during run time. conversely, dead-time ( dt ) and minimum pulse width ( mpw ) are not supposed to be changed during run time. the cpu notifies the tpu that the new reload values are prepared by setting the ld_ok parameter. the tpu notifies the cpu that the reload values have been read and new values can be written by clearing the ld_ok parameter. the tpu writes the parameter sector, which indicates the current stator reference voltage vector position in sector 1 to 6. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 5 the following figures show the input stator reference voltage vector components u and u a , corresponding sectors and output pwm signal duty cycle ratios: figure 2. standard space vector modulation technique the following equations describe how the space vector modulation pwm signal high-times ht a , ht b , ht c and transition times t low-high and t high-low of each channel are calculated: 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude 0 60 120 180 240 300 360 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c phase a phase b phase c 0 60 120 180 240 300 360 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 u t u ? = u t u ? = u = x 2 3 y u u + = 2 3 z u u ? = sector: v. iv. iii. vi. i. ii. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 6 standard space vector modulation tpu function set (svmstd) sector i., iv.: sector ii., v.: y z a 2 z y c a 2 z y b 2 z y a ? = = + = = = ? ? + + ? + t h t t h t h t t t t sector iii., vi.: y x a 2 y x c c 2 y x b 2 y x a ? = = + = = = ? ? ? + + ? t h t t h t h t t t t x z b 2 z x c a 2 z x b 2 z x a ? = = + = = = + ? + + ? + t h t t h t h t t t t center_time t a ht dt dt top channel bottom channel center_time t a ht dt dt top channel bottom channel phase a: ? top channel 2 e center_tim 2 e center_tim a low - high a high - low d t ht t d t ht t ? + = ? ? = ? bottom channel 2 e center_tim 2 e center_tim a high - low a low - high d t ht t d t ht t + + = + ? = phase b and phase c similarly with ht b and ht c substituted to ht a . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 7 host interface table 5. svmstd_top control bits name options channel function select svmstd_top function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? not used 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable x ? not used channel interrupt status x ? not used table 6. svmstd_bottom control bits name options channel function select svmstd_bottom function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? stop written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 1 0 1 0 0 0 32 1 0 1 0 1 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 8 standard space vector modulation tpu function set (svmstd) tpu function svmstd_bottom generates an interrupt when the current values of ualfa , ubeta , t and prescaler have been read by the tpu, and indicates to the cpu that it can write new variables. the cpu program can either wait for this interrupt to occur, or poll the ld_ok bit to check it has cleared. the interrupt is generated at each reload by one of the bottom channels. the top channels do not generate any interrupts. host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted table 7. svmstd_top and svmstd_bottom parameter ram channel parameter1514131211109876543210 phase a top channel 0 hta 1 hltime_at 2 bottom_chan_a 3 center_time 4 ld_ok 5 sector 6 7 fault_pinstate phase a bottom channel 0 lhtime_ab 1 hltime_ab 2 ua 3 ub 4 ualfa 5 ubeta 6 7 table 6. svmstd_bottom control bits name options 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 9 phase b top channel 0 htb 1 hltime_bt 2 bottom_chan_b 3 ua3 4sqrt3 5 sync_presc_addr 6 7 phase b bottom channel 0 lhtime_bb 1 hltime_bb 2 t_copy 3 dec 4 t 5 prescaler 6 7 phase c top channel 0 htc 1 hltime_ct 2 bottom_chan_c 3 prsc_copy 4 5 6 7 phase c bottom channel 0 lhtime_cb 1 hltime_cb 2 min_ht 3 max_ht 4 dt 5 mpw 6 7 table 8. svmstd_top and svmstd_bottom parameter description parameter format description parameters written by cpu ualfa, ubeta 16-bit fractional stator reference voltage vector components t 16-bit unsigned integer pwm period in number of tcr1 tpu cycles prescaler 16-bit unsigned integer the number of pwm periods per reload of new values table 7. svmstd_top and svmstd_bottom parameter ram channel parameter1514131211109876543210 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 10 standard space vector modulation tpu function set (svmstd) performance dt 16-bit unsigned integer dead-time in number of tcr1 tpu cycles mpw 16-bit unsigned integer minimum pulse width in number of tcr1 tpu cycles. see performance for details. sqrt3 16-bit fractional sqrt(3)/2 = 0.866 = $6eda constant sync_presc_addr 8-bit unsigned integer address of synchronization channel prescaler parameter: $x4, where x is synchronization channel number. $0 if no synchronization channel is used. parameters written by both tpu and cpu ld_ok 1-bit 0 ... cpu can update variables 1 ... tpu can read variables cpu sets 1, tpu sets 0 parameters written by tpu sector 16-bit unsigned integer the position of stator reference voltage vector in a sector. the sector can be 1, 2, 3, 4, 5 or 6 fault_pinstate 0 or 1 if fault channel is used, state of fault pin: 0 ... low 1 ... high other parameters are just for tpu function inner use. table 8. svmstd_top and svmstd_bottom parameter description parameter format description table 9. svmstd_top state statistics state max imb clock cycles ram accesses by tpu hl 2 1 lh_c5 28 10 table 10. svmstd_bottom state statistics state max imb clock cycles ram accesses by tpu init 108 32 stop 38 0 lh 2 1 hl 6 1 lh_rld 44 16 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 11 note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 3. svmstd_top and svmstd_bottom timing note: the bottom channel with longest momentary low-time is marked by a flag0 and runs the lh_rld and c1, c2, c3, c4 states. c1 48 3 c2 48 4 c3 50 3 c4 48 8 table 10. svmstd_bottom state statistics state max imb clock cycles ram accesses by tpu lh_c5 lh_c5 center_time center_time t t flag0 = 1 c1 c2 c3 lh_rld c4 lh_c5 lh_c5 lh_c5 lh_c5 hl hl hl hl hl hl hl hl hl hl hl hl lh lh lh lh not a reload period lh_rld reload period phase a phase b phase c -top -bottom -top -bottom -top -bottom lh_c5 lh_c5 center_time center_time t t flag0 = 1 c1 c2 c3 lh_rld c4 lh_c5 lh_c5 lh_c5 lh_c5 hl hl hl hl hl hl hl hl hl hl hl hl lh lh lh lh not a reload period lh_rld reload period phase a phase b phase c -top -bottom -top -bottom -top -bottom f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 12 standard space vector modulation tpu function set (svmstd) figure 4. svmstd_top and svmstd_bottom state diagram minimum pulse width the tpu cannot generate pwm signals with duty cycle ratios very close to 0% or 100%. the minimum pulse width that the tpu can be guaranteed to correctly generate is determined by the tpu function itself and by the activity on the other channels. when the tpu function is requested to generate a narrower pulse a collision can occur. to prevent this, the parameter mpw (minimum pulse width) is introduced. the tpu functions svmstd_top and svmstd_bottom limit the narrowest generated pulse widths to mpw . the cpu program should check, and limit, the maximum amplitude of the stator reference voltage vector before decomposition to u , u a components. the maximum amplitude of the stator reference voltage vector should be less than if this is not the case, the tpu function will start to limit the minimum pulse widths to mpw to prevent a collision, and the duty cycle ratio traces will be deformed as shown on figure 5 . init stop lh_rld hl lh lh_c5 hl c1234 flag0 = 1 hsr = 10 3-times hsr = 11 flag0 = 0 flag0 = 1 4 th -time reload no reload yet phase a phase b phase c - bottom - bottom - bottom -top -top -top init stop lh_rld hl lh lh_c5 hl c1234 flag0 = 1 flag0 = 1 hsr = 10 3-times hsr = 11 flag0 = 0 flag0 = 1 4 th -time reload no reload yet phase a phase b phase c - bottom - bottom - bottom -top -top -top t dt mpw ) ( 2 1 + ? f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 13 figure 5. effect of limitation the mpw is written by the cpu. the mpw depends on the whole tpu unit configuration, especially the lengths of the longest states of other functions, and their priorities, running on the same tpu. the mpw has to be correctly calculated at the time the whole tpu unit is configured. figure 6. timing of the worst case when svmstd_top and svmstd_bottom are running alone on one tpu, the minimum pulse width can be calculated according to figure 6 . this illustrates the worst case timing. the bottom channel low to high transition runs the hl state that sets the following high to low transition. the hl state lasts 6 imb clock cycles (see table 10 ). each state is preceded by the time slot transition (tst), which takes 10 imb clock cycles. so the time necessary to set the next transition on the bottom channel is 16 imb clock cycles. in addition, there is a latency between the low to high transition and the start of the hl state. the top channel state lh_c5, which is serviced at the time, causes the latency. the lh_c5 state lasts 28 imb clock cycles (see table 9 ). its time slot transition is 0 60 120 180 240 300 360 0 standard space vector modulation technique - limitation duty cycle ratios phase a phase b phase c 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 60 120 180 240 300 360 0 60 120 180 240 300 360 0 standard space vector modulation technique - limitation duty cycle ratios phase a phase b phase c phase a phase b phase c 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 hl center_time lh_c5 bottom channel top channel mpw latency dt hl center_time lh_c5 bottom channel top channel mpw latency dt f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 14 standard space vector modulation tpu function set (svmstd) 10 imb clock cycles. the service starts immediately after the top channel high to low transition, which occurs at a period of dt before the bottom channel low to high transition (see figure 6 ), so that the latency is 28 imb clock cycles + 10 imb clock cycles ? dt . the svmstd functions are designed so that no other svmstd state can request service at this time. the mpw , in the case when only svmstd functions are running on one tpu, is then latency + 16 imb clock cycles = = 28 imb clock cycles + 10 imb clock cycles ? dt + 16 imb clock cycles = = 54 imb clock cycles ? dt and is a minimum at least 16 imb clock cycles (when latency = 0). note that the mpw , as well as the dt , are not entered into the parameter ram in imb clock cycles, but in tcr1 clock cycles. it is recommended for the svmstd function that the tcr1 clck is configured for its maximum speed, which is the imb clock divided by 2. in this case the mpw = 27 ? dt , with a minimum value of 8. when other functions are running together on the same tpu as the svmstd functions, the latency could be lengthened. to maintain sufficiently high performance of svmstd, it is recommended that the following rules are followed to configure the tpu: assign svmstd pwm channels high priority assign svmstd pwm functions on low channel numbers so that no other function with high priority is assigned a channel with a lower number in this instance, one of the two worst case timing cases can happen. these are illustrated in figure 7 and figure 8 . which case occurs depends on the dt . figure 7. worst case timing ? case one hl lh_c5 bottom channel top channel mpw latency dt h tst+4 l h h m tst+4 tst tst tst time slot sequence hl lh_c5 bottom channel top channel mpw latency dt h tst+4 l h h m tst+4 tst tst tst time slot sequence f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 15 figure 8. worst case timing ? case two the time slot sequences at the top of both figures shows when a state of a high (h), middle (m) or low (l) priority is serviced in the worst case. to calculate the mpw follow these steps: get the lengths of the longest states. ? it is necessary to know the lengths of the longest states within all functions of each priority group. the initialization states are not considered ? only the running states. let's denote h as the time period of the longest state within all functions running on high priority (do not consider svmstd functions). let's denote m as the time period of the longest state within all functions running on middle priority and l as the time period of the longest state within all functions running on low priority. decide which case of timing can occure. ? the first case can occure when the dt (in imb clock cycles) is less than tst + h + tst + m + tst+4 + lh_c5 + tst+4 + l (see figure 8 ) that is 4*tst + 8 + h + m + l + lh_c5 that is 76 + h + m + l imb clock cycles. if dt (in imb clock cycles) < 76 + h + m + l then ? case one else ? case two calculate mpw based on case one or case two. ?in case one the mpw is (according to figure 7 ) tst + h + tst + m + tst+4 + lh_c5 + tst + l + tst+4 + hl ? dt that is 92 + h + m + l ? dt imb clock cycles. mpw (in imb clock cycles) = 92 + h + m + l ? dt hl lh_c5 bottom channel top channel mpw latency dt h tst+4 l h h m tst+4 tst tst time slot sequence m or l tst h tst tst+4 hl lh_c5 bottom channel top channel mpw latency dt h tst+4 l h h m tst+4 tst tst time slot sequence m or l tst h tst tst+4 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 16 standard space vector modulation tpu function set (svmstd) ?in case two the mpw is (according to figure 8 ) tst + h + tst + max ( m , l ) + tst+4 + hl that is 40 + h + max ( m , l ) imb clock cycles. mpw (in imb clock cycles) = 40 + h + max ( m , l ) convert mpw in imb clock cycles to mpw in tcr1 clock cycles based on tcr1 prescaler settings. when there are no channels of middle or low priority, simply leave out all the h or l and the following tst or tst+4 from the formulas. when the recommended configuration rules are not adhered to, the timing of the worst case is considerably more complicated. it requires some familiarity with the details of the tpu priority scheme. in this case, the worst-case latency (wcl), which is automatically calculated by the mpc500_quick_start graphical configuration tool, can serve as a good approximation. this is always longer than the real-case. let the wcl be calculated after the configuration of tpu channels and then find the longest wcl value within all svmstd pwm channels. convert the number, from imb clock cycles to tcr1 clock cycles, to get the mpw . synchronization signal for standard space vector modulation (svmstd_sync) the svmstd_sync tpu function uses information obtained from svmstd pwm functions, the actual pwm center times and the pwm periods. this allows a signal to be generated, which tracks the changes in the pwm period and is always synchronized with the pwm. the synchronization signal is a positive pulse generated repeatedly after the prescaler or presc_copy pwm periods (see next paragraph). the low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of tcr1 tpu cycles before or after the pwm period center time. the pulse width pw is another synchronization signal parameter. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 17 figure 9. synchronization signal adjustment examples synchronized change of pwm prescaler and synchronization signal prescaler the svmstd_sync tpu function actually uses the presc_copy parameter instead of the prescaler parameter. the prescaler parameter holds the prescaler value that is copied to the presc_copy by the svmstd_bottom function at the time the pwm parameters are reloaded. this ensures that new prescaler values for the pwm signals, as well as the synchronization signal, are applied at the same time. write the synchronization signal prescaler parameter address to the sync_presc_addr parameter to enable this mechanism. write 0 to disable it, and remember to set the synchronization signal presc_copy parameter instead of the prescaler parameter in this case. host interface center_time t center_time t center_time t pw |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t pw |move| m ove > 0 p rescaler = 1 center_time t center_time t center_time t pw |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t pw |move| m ove > 0 p rescaler = 1 table 11. svmstd_sync control bits name options channel function select svmstd_sync function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 18 standard space vector modulation tpu function set (svmstd) tpu function svmstd_sync generates an interrupt after each low to high transition. host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted table 12. svmstd_sync parameter ram channel parameter1514131211109876543210 synchronization channel 0 move 1 pw 2 prescaler 3 presc_copy 4 time 5 dec 6 t_copy 7 table 13. svmstd_sync parameter description parameter format description parameters written by cpu move 16-bit signed integer the number of tcr1 tpu cycles to forego (negative) or come after (positive) the pwm period center time pw 16-bit unsigned integer synchronization pulse width in number of tcr1 tpu cycles. table 11. svmstd_sync control bits name options 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 19 performance there is one limitation. the absolute value of parameter move has to be less than a quarter of the pwm period t . note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 10. svmstd_sync timing prescaler 16-bit unsigned integer the number of pwm periods per synchronization pulse ? use in case of synchronized prescalers change presc_copy 16-bit unsigned integer the number of pwm periods per synchronization pulse ? use in case of asynchronized prescalers change parameters written by tpu other parameters are just for tpu function inner use. table 13. svmstd_sync parameter description parameter format description table 14. svmstd_sync state statistics state max imb clock cycles ram accesses by tpu init 12 5 s1 12 6 s2 8 3 s3 16 7 4 t move < s1 s2 s3 s1 s2 center_time t center_time t center_time t s1 s2 s3 s1 s2 center_time t center_time t center_time t f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 20 standard space vector modulation tpu function set (svmstd) figure 11. svmstd_sync state diagram resolver reference signal for standard space vector modulation (svmstd_res) the svmstd_res tpu function uses information read from the svmstd pwm functions, the actual pwm center times and the pwm periods. this allows a signal to be generated, which tracks the changes of the pwm period and is always synchronized with the pwm. the resolver reference signal is a 50% duty-cycle signal with a period equal to prescaler or synchronization channel presc_copy pwm periods (see next paragraph). the low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of tcr1 tpu cycles before or after the pwm period center time. figure 12. resolver reference signal adjustment examples s1 s2 s3 init hsr = 10 s1 s2 s3 init hsr = 10 center_time t center_time t center_time t |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t |move| m ove > 0 p rescaler = 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 21 synchronized change of pwm prescaler and resolver reference signals prescaler the svmstd_res tpu function can inherit the synchronization signal prescaler that is synchronously changed with the pwm prescaler. write the synchronization signals presc_copy parameter address to the presc_addr parameter to enable this mechanism. write 0 to disable it, and in this case set the prescaler parameter to directly specify prescaler value. host interface table 15. svmstd_res control bits name options channel function select svmstd_res function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable x ? not used channel interrupt status x ? not used written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 22 standard space vector modulation tpu function set (svmstd) performance there is one limitation. the absolute value of parameter move has to be less than a quarter of the pwm period t . table 16. svmstd_res parameter ram channel parameter1514131211109876543210 resolver 0 move 1 2 presc_addr 3 prescaler 4 time 5 dec 6 t_copy 7 table 17. svmstd_res parameter description parameter format description parameters written by cpu move 16-bit signed integer the number of tcr1 tpu cycles to forego (negative) or come after (positive) the pwm period center time presc_addr 16-bit unsigned integer $00x6, where x is a number of synchronization signal channel, to inherit sync. channel prescaler or $0000 to enable direct specification of prescaler value in prescaler parameter prescaler 1, 2, 4, 6, 8, 10, 12, 14, ... the number of pwm periods per synchronization pulse ? use when apresc_addr = 0 parameters written by tpu other parameters are just for tpu function inner use. 4 t move < f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 23 note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 13. svmstd_res timing figure 14. svmstd_res state diagram fault input for standard space vector modulation (svmstd_fault) the svmstd_fault is an input tpu function that monitors the pin, and if a high to low transition occurs, immediately sets all pwm channels low and cancels all further transitions on them. the pwm channels, as well as the synchronization and resolver reference signal channels (if used), have to be initialized again to start them running. table 18. svmstd_res state statistics state max imb clock cycles ram accesses by tpu init 12 5 s1 26 9 s3 18 7 s1 s1 s3 center_time t center_time t center_time t s1 s3 init hsr = 10 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 24 standard space vector modulation tpu function set (svmstd) the function returns the actual pinstate as a value of 0 (low) or 1 (high) in the parameter fault_pinstate . the parameter is placed on the phase a ? top channel to keep the fault channel parameter space free. host interface tpu function svmstd_fault generates an interrupt when a high to low transition appears. table 19. svmstd_fault control bits name options channel function select svmstd_fault function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted written by cpu written by tpu written by both cpu and tpu not used 3 21 0 1 0 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 25 performance note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) table 20. svmstd_fault parameter ram channel parameter1514131211109876543210 fault input 0 1 2 3 4 5 6 7 table 21. svmstd_fault parameter description parameter format description table 22parameters written by tpu fault_pinstate 0 or 1 state of fault pin: 0 ... low 1 ... high table 23. svmstd_fault state statistics state max imb clock cycles ram accesses by tpu init 8 2 fault 44 1 no_fault 4 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d 26 standard space vector modulation tpu function set (svmstd) figure 15. svmstd_fault timing figure 16. svmstd_fault state diagram fault no_fault fault init hsr = 10 no_fault f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d detailed function description standard space vector modulation tpu function set (svmstd) 27 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
an2528/d rev. 0 5/2003 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

▲Up To Search▲

Price & Availability of AN2528D

	To Download AN2528D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .